The invention relates to a balanced transformer-less (BTL) power drive circuit for use in a disk drive system for a CD, a CD-ROM, and an MD for example.
Many of disk drive systems for CDs, CD-ROMs, and MDs employ a BTL power drive circuit. FIG. 1 shows a push-pull type power drive circuit for use in a BTL power drive circuit having two such push-pull drive circuits.
As shown in FIG. 1, an NPN output transistor Q1 and an NPN output transistor Q2 are connected in series between a main power supply having an electric potential PowVcc and the ground of potential E. The node of the transistors Q1 and Q2 is connected to the output terminal of the circuit for provision of an output potential Vout. Connected between the base and the emitter of the transistor Q1 is a resistor R1, and connected between the collector and the base of the transistor Q2 are a PNP transistor Q4 and a capacitor C1, and is a resistor R2 between the base and the emitter of the transistor Q2. The output terminal OUT is also connected, via a resistor R5, to a node having a reference output potential Vref (which will be hereinafter referred to as internal reference potential Vref).
When an input signal Vin is supplied to the input terminal IN of a pre-buffer section (hereinafter referred to as pre-buffer circuit) B1 serving as an input control section of the power drive circuit. An PNP transistor Q3 of the pre-buffer circuit B1 provides its output signal to the bases of the transistors Q1 and Q2, under the control of the input signal Vin.
The pre-buffer circuit B1 further includes PNP transistors Q5 and Q6, and NPN transistors Q7 and Q8, resistors R3, R4, and R6, a diode D1, and constant current sources I1, I2, and I3, as shown in FIG. 1.
The input signal Vin shown in FIG. 1 is formed by an input signal and an internal reference potential Vref in a pre-stage difference amplifier circuit (not shown) which is driven by the potential PowVcc of the main power supply PowVcc. In other words, a DC potential arising from the main power supply potential PowVcc is superposed on the input signal Vin at the input terminal IN.
When no signal is supplied to the power drive circuit shown in FIG. 1, i.e. the level of the input signal Vin is zero, the level of the output potential Vout of the circuit is equal to the internal reference potential Vref. Since the NPN output transistors Q1 and Q2 are controlled by the input signal Vin, the output potential Vout is swung accordingly in the positive/negative direction about the internal reference potential Vref as the input signal Vin deviates from zero in the positive/negative direction.
The upper limit of the output potential Vout of the power drive circuit is defined by the saturation voltage Vsat of the PNP output transistor Q3 and by the forward base-emitter potential drop Vf of the NPN output transistor Q1, so that the upper limit will be [PowVccxe2x88x92Vsatxe2x88x92Vf]. Similarly, the lower limit of the output potential Vout is defined to be the saturation voltage Vsat of the NPN output transistor Q2.
Consequently, the width of the dynamic range of the output potential Vout will be [PowVccxe2x88x922Vsatxe2x88x92Vf], with the internal reference potential Vref set to the medium [(PowVccxe2x88x92Vf)/2].
FIG. 2 shows a BTL power drive circuit comprising of two push-pull type power drive circuits as shown in FIG. 1, where components in one power drive circuit that correspond to the counterparts in the other power drive circuit are denoted with primes (xe2x80x2). It is noted that a load L is connected between the output terminal OUT of one power drive circuit and the output terminal OUTxe2x80x2 of the other power drive circuit, and that an inverted input signal {overscore (Vin)}, which is the inversion of the input signal Vin, is applied to the input terminal {overscore (IN)} of the other power drive circuit.
In the BTL power drive circuit of FIG. 2, the output potentials Vout and Voutxe2x80x2 of the output terminals OUT and OUTxe2x80x2, respectively, are swung in the opposite directions with respect to the internal reference potential Vref in response to the input signal Vin, so that the dynamic range of the output potential Vout is double that of the power drive circuit of FIG. 1, thereby providing a doubly large driving power for the load.
However, in the power drive circuit of FIG. 1 and hence in the BTL power drive circuit of FIG. 2, the upper limits of the output potential Vout and Voutxe2x80x2 are limited by the saturation voltage Vsat of the PNP transistor Q3 and the forward potential drop across the base-emitter of the NPN transistor Q1. The forward base-emitter potential drop Vf is substantially constant and has a dominant influence on the output voltage Vout and Voutxe2x80x2 as compared with the saturation voltage Vsat. Thus, in order to extend the dynamic range of a power drive circuit driven by a main power supply having a low potential PowVcc, it is desirable to remove the influence of the forward base-emitter potential drop Vf.
FIG. 3 shows a push-pull type power drive circuit which is an improvement of the power drive circuit of FIG. 1, in which dynamic range is extended by increasing the upper limit of the output potential Vout.
In FIG. 3, the main power supply of potential PowVcc is used as the power supply for the NPN output transistor Q1 and the NPN output transistor Q2. In addition, a further auxiliary power supply of potential PreVcc is used as the power supply for the pre-buffer circuit B1 that includes the PNP transistor Q3 and other elements.
In a disk system such as a CD-ROM which includes a high-voltage power supply of 12 Volt in addition to an ordinary 5 Volt power supply, the high-voltage power supply may be used as the auxiliary power supply PreVcc.
In this instance, the pre-stage differential amplifier circuit which receives a pre-stage input signal and an internal reference potential Vref, is driven by the auxiliary power supply potential PreVcc. The input signal Vin is fed to the input terminal IN and is superposed on a DC potential arising from the auxiliary power supply PreVcc.
As described above, when the potential PreVcc of the auxiliary power supply is the same as that of the main power supply PowVcc, as shown in FIG. 1, the upper limit of the output potential Vout, is given by [PowVccxe2x88x92Vsatxe2x88x92Vf], since the upper limit is given by the larger one of the saturation voltage Vsat of the NPN output transistor Q1 and the sum of the saturation voltage Vsat of the PNP transistor Q3 and the forward base-emitter potential drop Vf of the NPN output transistor Q1.
In contrast, the upper limit of the output potential Vout of the circuit of FIG. 3 is given by the supply potential PowVcc of the main power supply minus the saturation voltage Vsat of the NPN output transistor Q1, [PowVccxe2x88x92Vsat], since the upper limit is given by the smaller one of the auxiliary power supply potential PreVcc minus the saturation voltage Vsat of the PNP transistor Q3 and the forward base-emitter potential drop Vf of the NPN output transistor Q1, and the potential of the main power supply PowVcc minus the saturation voltage Vsat of the NPN output transistor Q1. Thus, the dynamic range of the drive circuit of FIG. 3 is extended by the enlarged output potential Vout.
It should be noted that although the dynamic range is extended on one hand by the use of the auxiliary power supply having as high as 12 Volts in the circuit shown in FIG. 3, high energy consumption by the pre-buffer circuit B1 is inevitable so long as the pre-buffer B1 uses the auxiliary power supply.
It would be understood that a BTL power drive circuit having an extended dynamic range can be formed, as shown in FIG. 4, using two power drive circuits shown in FIG. 3 having an extended upper limit of the output potential Vout. The BTL power drive circuit as shown in FIG. 4 has basically the same operational characteristics as the BTL power drive circuit as shown in FIG. 2, and a further description thereof will be omitted.
FIG. 5 shows the characteristic behaviors of the power drive circuits shown in FIGS. 1 and 3 in terms of the input signal Vin as a function of the output potential Vout. In the FIG. 5, xe2x80x9cixe2x80x9d stands for the characteristic for the circuit shown in FIG. 1, and xe2x80x9ciixe2x80x9d stands for the characteristic of the circuit shown in FIG. 3.
By comparing the characteristic curves xe2x80x9cixe2x80x9d and xe2x80x9ciixe2x80x9d shown in FIG. 5, it is seen that the upper limit Vout of the power drive circuit shown in FIG. 3 is higher than the upper limit of the corresponding output potential of the power drive circuit shown in FIG. 1 by the forward base-emitter potential drop Vf.
FIG. 6 shows characteristic curves xe2x80x9cixe2x80x9d and xe2x80x9ciixe2x80x9d representing the output potentials Voo of the BTL power drive circuits shown in FIGS. 2 and 4, respectively, in term of the input signal Vin.
It would be understood from FIG. 6 that the dynamic range of the output potential Voo is, for the BTL power drive circuit shown in FIG. 4, is extended to xc2x1[PowVccxe2x88x922Vsat] as shown by the characteristic curve xe2x80x9ciixe2x80x9d, as opposed to xc2x1[PowVccxe2x88x922Vsatxe2x88x92Vf] as shown by the curve xe2x80x9cixe2x80x9d for the BTL power circuit shown in FIG. 2.
It should be noted, however, that, in the regions denoted by xcex94Vin, i.e. in the regions Vin greater than Vi and Vin less than xe2x88x92Vi, where Vi is the input potential at which the output potential Vout saturates, the input-output gain of the power circuit of FIG. 4 decreases by a factor of xc2xd as compared with the gain in the region xe2x88x92Vi less than Vin less than Vi, as seen from the curve xe2x80x9ciixe2x80x9d. This is due to the fact that, in the case of xe2x80x9ciixe2x80x9d, unlike the case of xe2x80x9cixe2x80x9d, the saturation voltage as approached from the internal reference potential Vref to the potential of the main power supply PowVcc is greater than that approached to the ground potential E.
Consequently, although the dynamic range can be extended in the power drive circuits as shown in FIGS. 3 and 4, the linearity in the input-output characteristic is disadvantageously lost.
It is therefore an object of the invention to provide a BTL power drive circuit having two sets of drive circuits each having a push-pull type output transistor section driven by a common main power supply and an input control section driven by a common auxiliary power supply, characterized in that said BTL power drive circuit is capable of providing an extended dynamic range without losing the linearity of the input-output characteristic of the drive circuit by setting the potential of said auxiliary power supply equal to or above the supply potential of said main power supply.
In accordance with one aspect of the invention, a power drive circuit includes: a first push-pull type output transistor section connected between a main power supply having a potential PowVcc and the ground of potential E; a first input control section, connected between an auxiliary power supply of potential PreVcc and said ground of potential E, for receiving an input signal Vin and an output reference potential Vref to provide said first push-pull type output transistor section with a first control signal; a second push-pull type output transistor section connected between said main power supply of potential PowVcc and the ground of potential E; a second input control section connected between said auxiliary power supply of potential PreVcc and the ground of potential E, for receiving said output reference voltage Vref and an inverted input signal {overscore (Vin)}, which is an inversion of said input signal Vin, to provide said second push-pull type output transistor section with a second control signal; wherein each of said first and said second output transistor sections are adapted to provide two different dynamic ranges, one for a first mode where the potential PreVcc of said auxiliary power supply is equal to the potential PowVcc of said potential of the main power supply and another for a second mode where the potential PreVcc of said potential of the main power supply is higher than the potential PowVcc of said potential of the main power supply, said balanced transformer-less power drive circuit characterized in that said output reference potential Vref is set to a level in accord with the level of said potential PreVcc of said auxiliary power supply which is set equal to or above the potential PowVcc such that said level of said output reference potential Vref matches the medium of the dynamic ranges of said first and second output transistor sections.
In this BTL power drive circuit, in defining the dynamic range of the BTL power drive circuit, the potential of the auxiliary power supply is selectively set equal to or above the potential of the main power supply for a compromise between a dynamic range requirement and allowable power consumption of the circuit. The linearity of the input-output characteristic of the power drive circuit is always secured by setting the output reference potential (i.e. the internal reference potential) to the medium of the dynamic range as defined by the selected potential of the auxiliary power supply.
The BTL circuit may further comprise a reference potential set-up circuit capable of selectively setting up two different potentials for use as the medium of the dynamic range of the output transistor sections.
The reference potential set-up circuit may includes a circuitry having a transistor Q11 connected in parallel with a diode D11 to generate two different output reference potentials across the diode D11 by turning on and off the transistor Q11.
The reference potential set-up circuit may comprise: a circuitry including a transistor Q11 and a diode D11 connected in parallel with said transistor Q11; series connected voltage dividing resistors R11 and R12; and control means for controlling the conduction of said transistor Q11, with all of said circuitry Q11 and D11, series connected voltage diving resistors R11 and R12, and control means connected between said main power supply of potential PowVcc and the ground of potential E, wherein said output reference potential is given by the potential obtained at the node of said voltage dividing resistors R11 and R12.
This arrangement has a feature that an appropriate output reference potential Vref can be securely set up in a simple manner through the selection of the potential PreVcc of the auxiliary power supply.